Sunday, November 27, 2016

National Seminar and National FPGA Design Contest Archives

Second National Event on FPGA: Digitronix Nepal, IOE Pulchowk Campus, Himalaya College of Engineering Kathmandu Engineering College and Kathford Int'l College of Engineering and Mangt. had Organized the National FPGA Design Contest at July 1 -3 , 2016 at IOE Pulchowk Campus. Here is News Archive of Design Contest:

1. First FPGA design contest at July 1-3 (The Rising Nepal National Daily)

2. Himalaya College of Engineering wins the First National FPGA Design Contest, July 2 2016 (The Republica National Daily)

3. First National Level Contest on FPGA Design and Development In Nepal (Techguff.com)

Here is News at the Republica National Daily:
The Resolution of the Design Contest can be found here : 

First National Event on FPGA: Digitronix Nepal and Sagarmatha Engineering College had Organized National Seminar on " FPGA Design Platform in Engineering College of NEpal through XUP" at May 7, 2016 at Sagarmatha Engineering College, Lalitpur Nepal. Here is News Archive of Seminar on FPGA: 
Seminar on FPGA Design Platform in Engineering Colleges of Nepal through XUP- Xilinx University Program (Techguff.com)



For More details on FPGA Research in Nepal Please Visit: FPGA Research in Nepal and Its Implications

Tuesday, November 22, 2016

FPGA Project Archives of Digitronix Nepal

Project Accomplished:
--PCIe based Design (PCIe 3.0 IPI, PCIe DMA TRD)
--XDMA (DMA Subsystem for PCIe 3.0) Targeted Reference Design for Kintex Ultrascale      (KCU105) FPGA.
--Video Streaming and Processing with Zynq (Zybo) FPGA.
--Image Enhancement with Zynq FPGA.
--Verilog Course Design for Online Learning Site.
--AXI PCIe MIG Design Simulation and Implementation in Xilinx 7 Series and Ultrascale FPGA.
--Tcl Scripting for IPI design creation for PCIe Streamming Core for 7 series and Ultrascale Board.
--Understanding on Scatter Gather List (SGL Preparaion and Submission Block)

Conducted Training's on (for Professional and Academicians):
-- Embedded System Design with Zynq FPGA and VIVADO (Xilinx Training Syllabus)
--System Level Design with Zynq and VIVADO (RTOS and FSB Design)(Xilinx Training Syllabus)

Trainer on : Faculty Training
--FPGA Design with Zybo FPGA and VIVADO, Kantipur Engineering College
--FPGA Design with  VIVADO Design Suit, Khwopa College of Engineering
Student Training
--FPGA Design with Xilinx ISE Design Suit, Himalaya College of Engineering

Research Outcomes (Paper, Proceedings and Articles) on:
--Very High Speed Packet Processing with FPGA and Custom Hardware (few Gbps to several Gbps)
--Packet Processing with heterogenous hardware: Herterogenous Computing
--RISC Processor Design
--Data Center based IP Design

Other Skill Sets:
--Skills on FPGA Design Flow with VIVADO (Xilinx Training Syllabus)
-- Embedded System Design with Zynq FPGA and VIVADO (Xilinx Training Syllabus)
--System Level Design with Zynq and VIVADO (RTOS and FSB Design)(Xilinx Training Syllabus)
--Image Processing with Zynq FPGA.

Market Research:
--FPGA Market Review on Telecom, Medical and Automotive Market Segment.

Short  Reviews on:
--Packet Processing with OpenCL : Review
--SDN Implementation on FPGA
--SDR Implementation on FPGA.

Lab Instruction (for Universities/Colleges) on:
--Embedded System Design with FPGA, Designing Custom 8 bit Processor and Implementing FSM.
--HDL implementation on Digital Design, Digital Logic
--Computer Architecture Design with Verilog HDL.

Monday, November 21, 2016

Vacancy on Hardware Engineer (FPGA Design Engineer) at Digitronix Nepal

We are currently hiring professionals with FPGA Design Skills. We also have Paid Internship on FPGA Research and Development.
Responsibilities of Hardware Engineer (FPGA Design Engineer):
  • Interface with electrical, firmware teams to design hardware to evaluate new technologies and features
  • Propose, review, and implement micro-architecture
  • Design and verify systems and IP using VHDL, Verilog and SystemVerilog
  • Create appropriate test benches prior to hardware availability
  • Perform Synthesis, Place & Route, timing optimizations
  • Perform bring-up, debug, and validation of designs to achieve functional and performance goals
Qualification:
  • FPGA tool (VIVADO) flows, Xilinx preferred 
  • Familiarity with FPGA and/or ASIC design tools used for RTL development.Constraining for FPGA synthesis.
  • Experience with industry-standard protocols (PCI Express, USB, Ethernet, etc.) 
Contact us for Paid Internship Details.
Digitronix Nepal is working on IP Design , Development and Verification field from past few years. We have developed IP's on Communication, Networking and Data Center Application for different Xilinx FPGAs.
Digitronix Nepal's Resources on FPGA | ASIC based  IP Design & Verification and Marketing : Digitronix's Resources on FPGA
Our recent development can be viewed at : Recent Development
An Market Review on FPGA , ASIC and VLSI Design/Verification : Market Review FPGA

Thursday, November 17, 2016

Internship on FPGA based Machine Learning and Neural Net Implementation

Digitronix Nepal have Some Places on AI (Machine Learning, Neural Nets) based Research & Development in FPGA. Interested enthusiast can contact us at : digitronixnepali@gmail.com or at 
+977-9841078525.

Digitronix Nepal will welcome application on ML and NN and what we require is we like to engage interns on Machine Learning and Neural Nets based on FPGA Research and Development.There will be the selection process for internship.
So for the application here is Prerequisite knowledge and skills : 
  1.  VHDL/Verilog and C/C++ (Basic/Moderate), 
  2. Idea of FPGA (algorithm implementation on Zynq based FPGA: Zybo FPGA).
  3. AI (Neural Net and Machine Learning).
Please review also the following link (copied of google search): Neural Net implementation on FPGA

Internship on FPGA based Machine Learning and Neural Net Implementation

Digitronix Nepal have Some Places on AI (Machine Learning, Neural Nets) based Research & Development in FPGA. Interested enthusiast can contact us at : digitronixnepali@gmail.com or +977-9841078525.

Digitronix Nepal will welcome application on ML and NN and what we require is we like to engage interns on Machine Learning and Neural Nets based on FPGA Research and Development.There will be the selection process for internship.
So for the application here is Prerequisite knowledge and skills : 
  1.  VHDL/Verilog and C/C++ (Basic/Moderate), 
  2. Idea of FPGA (algorithm implementation on Zynq based FPGA: Zybo FPGA).
  3. AI (Neural Net and Machine Learning).
You can also watch our YouTube tutorial on "How to implement Neural Net on Pynq FPGA".

Please review also the following link (copied of google search): Neural Net implementation on FPGA
Machine Learning Implementation on FPGA
Some FAQ's: how long this project will run and what is the procedure for selection and what number of people can attend this program.
Answers: this project will run for three month initially (and more depends on the objective/goal) based on more than 10 credit/week, selection procedure is based on the knowledge/skill on VHDL/Verilog,FPGA and AI, there will be one team (upto five members) working on this stream.

Wednesday, November 9, 2016

FPGA, ASIC and VLSI in Nepal: A Market, Design and Development Trends

Global FPGA (Field Programmable Gate Array) Market is increasing rapidly and will grow more fast with creating large number of opportunities for Hardware, Electronics and Embedded Design Professionals. Along with ASIC (Application Specific Integrated Circuit) and VLSI (Very Large Scale Integration Circuits) Design/Verification Market this FPGA Market contribute large scale of opportunities globally and Opportunities will increase more rapidly due to implementation of FPGA in IOT (Internet of Thinngs), Smart Systems, High Speed Communication based infrastructure development and many automated systems. #Digitronix #Nepal believes that this FPGA Design, ASIC and VLSI Design/Verification works can be done in Nepal so number of opportunities can be created for Nepalese Engineers/Professionals. We believe to work in FPGA based IP (Intellectual Property) Design portfolio which consists of Design/Development and Marketing of different application based IP design for FPGA based systems (Telecommunication infrastructure, Smart systems, Industrial/manufacturing systems).  Digitronix Nepal has all the necessary resources(Development Systems, HR and Sales/Marketing) for IP Development and Marketing, we have establishing global presence to address design challenges and support customers more effectively (time to market, design complexity).

Digitronix Nepal is also working on ASIC Design Portfolio for which we are collaborating many international companies in ASIC. For ASIC Design another stream of engineering is VLSI Design and Verification. We are developing group of experts for work in VLSI Design stream to accept and fulfill customer's demand on Electronic/Embedded Systems Design and Development.

As for creating more genuine (expertise) teams we are training and enhancing skills of our teams and we are engaging more interns on FPGA, ASIC and VLSI Design. We currently getting direction from industries professional from Ireland so we are able to establish global approach on Design and Marketing of our products (IP's and Systems) and Services (Design/Verification). 
https://www.facebook.com/groups/FPGAASICVLSI/
For more detail join facebook group:https://www.facebook.com/groups/FPGAASICVLSI/

#Global #Market #Scenario #of #FPGA #ASIC #VLSI #Design #Verification.

Global Scenario of FPGA , ASIC and VLSI Field is : FPGA Market is Expected to Reach USD 9,734.4 Million in 2020Research and Markets: FPGA Market to 2020 - Increasing Preference for FPGAs over (ASICs) .FPGA Market by Architecture (SRAM Based FPGA, Anti-Fuse Based FPGA, and Flash Based FPGA), Configuration (High-End FPGA, Midrange FPGA, and Low-End FPGA), Application, and Geography - Trends & Forecasts to 2022
According to marketsandmarkets ,The demand for advanced driver assistance systems (ADAS) in the automotive sector, growth in the number of mobile devices in the consumer electronics sector, the demand for Internet of things (IoT) and machine to machine (M2M), and growth in the number of data centers driven by the demand of big data and cloud computing are some of the factors driving the FPGA market. (Image are from Google and Xilinx.com)

Sunday, November 6, 2016

FPGA IP Design, Development and Marketing Resources of Digitronix Nepal


                                    Human Resources and Development Resources
A.FPGA Researcher (Designer): 4
Experience
Designing the VHDL/Verilog core for communication, networking products.

Roles:VHDL/Verilog/tcl Command based on VIVADO Design Suit and Simulation Programs.
Working on design/required framework, language and systems.

B.Project Lead:
Roles: Project Architect, Project Breakdown and Team Mobilization
Project Experience:  IP Design for Applications as  Image Processing, Networking (High Speed Packet Processing), Serial Communication (UART, I2C)
Architect for  Projects based in Tcl and Providing IP's Secure Utilization in Other Top Modules.


C. FPGA IP Marketing and Analysts: 2
Experienced on FPGA/ASIC based  IP Market Analysis and Product marketing in different customer requirements.

D. Support and Sales: Few
Support team works on frequent communication with customer, support person have specialization on each product streams of IP's while FPGA Researcher will support on much complex issues.
Sales person will communicate customers from early product demonstration to product sales.


E. Hardware Resource Available:
Xilinx Kinte KC705 Development Board: 1 Pieces
Xilinx Zybo FPGA Development Board: 2 Pieces
Spartn 3e and 6 Boards: 2 Pieces(each)

F. Development Tools:
VIVADO with Licenses: 5 Full Node Locked Licenses
Computers: 5 (with 8 GB+ RAM and Latest Processor

We have pool of resources while as our need we utilize those resources for Projects Design, Implementation, Sales and Marketing

Thursday, November 3, 2016

Current Development

Digitronix Nepal FPGA R & D Center has Developed Different IP's (Intellectual Properties) targeted for Different Xilinx FPGA Families and which are  targeted of market in Communication, Signal Processing and Networking.
We also Create Application based IP's as for as customer need. We deliver more cost effective IP for FPGA with effective customer support. Our IP can be purchased in different schemes (Netlist Node-Locked,Netlist Floating and  Source Code Single Site) which have different price range variations.
Ready to deliver IP's
    1.High Speed Data Streamming Interface with DMA and PCIe targeted for Communication Equipments
    2.Application based IP(Signal Processing) and Peripheral Cores (UART, I2C etc.)
       Targeted FPGA's are:
          a.7 Series FPGA of Xilinx
          b.Ultrascale FPGA Family of Xilinx.

Wednesday, November 2, 2016

Internship Opportunities at Digitronix Nepal

Digitronix Nepal is providing Internships on different Level of FPGA Research and Development. The Internship Plan on FPGA R & D is Available here.  Digitronix Nepal also Provides Internships on Hardware Design/Development and Prototyping (using Proteus Design, Altium Designer, Cadence Allegro and Analog/Digital Design tools/method)  and Software Developments (Android Development, MIS Development etc.).