Tuesday, November 22, 2016

FPGA Project Archives of Digitronix Nepal

Project Accomplished:
--PCIe based Design (PCIe 3.0 IPI, PCIe DMA TRD)
--XDMA (DMA Subsystem for PCIe 3.0) Targeted Reference Design for Kintex Ultrascale      (KCU105) FPGA.
--Video Streaming and Processing with Zynq (Zybo) FPGA.
--Image Enhancement with Zynq FPGA.
--Verilog Course Design for Online Learning Site.
--AXI PCIe MIG Design Simulation and Implementation in Xilinx 7 Series and Ultrascale FPGA.
--Tcl Scripting for IPI design creation for PCIe Streamming Core for 7 series and Ultrascale Board.
--Understanding on Scatter Gather List (SGL Preparaion and Submission Block)

Conducted Training's on (for Professional and Academicians):
-- Embedded System Design with Zynq FPGA and VIVADO (Xilinx Training Syllabus)
--System Level Design with Zynq and VIVADO (RTOS and FSB Design)(Xilinx Training Syllabus)

Trainer on : Faculty Training
--FPGA Design with Zybo FPGA and VIVADO, Kantipur Engineering College
--FPGA Design with  VIVADO Design Suit, Khwopa College of Engineering
Student Training
--FPGA Design with Xilinx ISE Design Suit, Himalaya College of Engineering

Research Outcomes (Paper, Proceedings and Articles) on:
--Very High Speed Packet Processing with FPGA and Custom Hardware (few Gbps to several Gbps)
--Packet Processing with heterogenous hardware: Herterogenous Computing
--RISC Processor Design
--Data Center based IP Design

Other Skill Sets:
--Skills on FPGA Design Flow with VIVADO (Xilinx Training Syllabus)
-- Embedded System Design with Zynq FPGA and VIVADO (Xilinx Training Syllabus)
--System Level Design with Zynq and VIVADO (RTOS and FSB Design)(Xilinx Training Syllabus)
--Image Processing with Zynq FPGA.

Market Research:
--FPGA Market Review on Telecom, Medical and Automotive Market Segment.

Short  Reviews on:
--Packet Processing with OpenCL : Review
--SDN Implementation on FPGA
--SDR Implementation on FPGA.

Lab Instruction (for Universities/Colleges) on:
--Embedded System Design with FPGA, Designing Custom 8 bit Processor and Implementing FSM.
--HDL implementation on Digital Design, Digital Logic
--Computer Architecture Design with Verilog HDL.

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