Monday, January 30, 2017

Digitronix Nepal: FPGA Tutorial Series on YouTube

Digitronix Nepal has Updated own YouTube Channel with more new Video on ISE Design Suit, Spartan 3E, Zybo FPGA, Pynq FPGA and ZedBoard FPGA. We Currently have more than 30 Tutorials on FPGA Design using ISE Design Suit & Vivado Design Suit from Xilinx.Now, We have more than 10 Turorial Session on ZedBoard, similar no of Zybo Tutorials (including how to create IP in HDL and HLS, Program FPGA in VHDL/Verilog) and we also have ISE and Spartan FPGA Tutorials on: Basic Logic Gate Design, Full Adder Design Structurally and Finite State Machine based Design in VHDL.You will get complete idea of How to Write VHDL Programs ,Create Bitstream and then Configure FPGA.

Along with this tutorials we also have releases our VHDL/Verilog and Tcl Reference Guides for Enthusiasts. We believe that enthusiasts can get huge benifit from this resources and can do/work on Projects based on FPGA and Microcontrollers. 

We also have different Internship offerings on FPGA research and development and Internet Of Things. We have more than 20 Tutorial series on different Microcontrollers to.

or go to ISE Design Suit Tutorial Playlist:



Tutorials on ZedBoard , Zybo, Pynq, Spartan 3E FPGA with ISE and VIVADO Design Suit

Tutorial for Beginners on Spartan 3E with VHDL and ISE Design Suit.
Some Videos are also available here for watching:

How to Create IP in VIVADO HLS: Watch

Thursday, January 19, 2017

Digitronix Nepal Projects on Zedboard along with Pynq ,Zybo & Spartan 3E

Digitronix Nepal has prepared & published the Video Tutorial series on ZedBoard FPGA, Spartan 3E FPGA, Nexys 3 FPGA, Zybo FPGA and Pynq FPGA previously at YouTube: https://www.youtube.com/c/digitronixnepal  and http://www.digitronixnepal.com/
Digitronix Nepal has prepared lots of Tutorial Series on FPGA, Currently in our YouTube Channel we have 8 Tutorials on Zedboard FPGA (including how to create IP in HDL and HLS, Program FPGA in VHDL/Verilog), 6 Tutorials on Zybo FPGA , 5 Tutorials on Spartan 3E and Different Projects of National FPGA Design Contest. We are syncing/uploading more tutorials on our Youtube Channel. Keep Streaming on our Youtube Channel!!! Along with this tutorials we also have releases our VHDL/Verilog and Tcl Reference Guides for Enthusiasts. We believe that enthusiasts can get huge benifit from this resources and can do/work on Projects based on FPGA and Microcontrollers. We also have different Internship offerings on FPGA research and development and Internet Of Things. We have more than 20 Tutorial series on different Microcontrollers to.
 Watch the video:of Zedboard Tutorial on Creating Custom Verilog IP of PWM in Vivado by Digitronix Nepal 
Projects Plan on ZedBoard:
1. Implementing a Image Processing System in OpenCV Framework
2. Designing a Traffic Sign Identification system for ADAS Application
3. Ethernet Firewall Design and Implementation on Zedboard
4. SDN and SDR Implementation 
5. Encryption Algorithm implementation on Zedboard
6. Embedding Custom Linux for Real Time Applications.
             We will welcome Project Ideas/Plan/Proposal from the Enthusiast and Clients.

Friday, January 6, 2017

Interaction Program on FPGA Design through Xilinx University Program (XUP)

Interaction Program on "FPGA Design through Xilinx University Program (XUP)" has been successfully completed which was Organized by Kathford Research & Development- R&D and Digitronix Nepal on Jan 6, 2017 at Kathford International College of Engineering and Management . We are thankful to Deepesh Man Shakya Sir for presenting insights on Global Trend on FPGA Design and It's implication in Nepal. We are especially thankful to Dr. Madhusudan Kayastha (मधुसुदन कायस्थ)Sir, Principal of KICEM for supporting on this initiation. We are thankful to Department Heads ,Professors/Lecturers and Students of different engineering colleges of Nepal.

Interaction Program on FPGA Design Poster
Principal of Kathford, Dr. Madhusudan Kayastha providing Token of Love to Guest Speaker of Program ,Deepesh Man Shakya (Xilinx Inc, Ireland).
Principal of Kathford, Dr. Madhusudan Kayastha providing Token of Love to Guest Speaker of Program ,Deepesh Man Shakya (Xilinx Inc, Ireland).

Participatants of the Interaction Program and Demonstration of FPGA Projects on Spartan 3e, Zybo and Pynq FPGA by Samundra K. Thapa and Ashutosh Karna.
The Resolution of the Interaction Program on FPGA Design through Xilinx University Program (XUP) can be found here: Resolution of interaction Program on FPGA and XUP