About Us

Digitronix Nepal is a Semiconductor Design, FPGA Design and Embedded Hardware Design Company. We have 11+ years of domain expertise and experiences on Semiconductor Design/Verification, FPGA Design and Embedded developments, as of that we  believe that we can deliver best product and services to our customer in the field.  
 
Many of our RTL IP Cores are implemented in ASIC designs including those for cryptography IP Cores. Digitronix Nepal is working on IP Design , Development and Verification field from past few years. We have developed different FPGA based IP's on Communication, Networking and Data Center Application for different Xilinx FPGAs.
  • We provide vast range of IP's for Different Family of FPGA's from Xilinx and Altera. Along with IP we provide Design Verification works.
On Embedded development, we have design and manufacture Smart Systems, Signal Processing Systems, Control and Automation systems.  


Some of News and Activities at Digitronix Nepal: 
  • Digitronix Nepal has signed MoU with IoE Pulchowk Campus, Kathmandu Engineering College, Himalaya College of Engineering, National College of Engineering, Kathford Int'l College of Engineering and Management, Sagarmatha Engineering College and Kantipur Engineering College for "establishing and operating FPGA Research and Development Center" at respective Colleges. The MoU archives can be viewed from here: (click here)
  • Digitronix Nepal's Story has been featured at: "The Gleam of Electronic Hardware"- New Business Age Magazine (Link)

  • Digitronix Nepal ambition to become Hardware Design Outsourcing Company in Nepal: Glocal Khabar (Startup Story)


Our past event and news can be get from: 
  1. Himalaya College Wins First National FPGA Design Contest 2016,My Republica
  2. Second All Nepal FPGA Design Competition 2017 Concludes, My Republica
  3. Second All Nepal FPGA Design Competition 2017 (Kantipur News Paper)
  4. Digitronix Nepal's Protfolio can be viewed at : Digitronix Nepal's Protfolio


Our recent development can be viewed at : Recent Development


Hardware Design, Development at Digitronix Nepal
  • FPGA based Image processing system
  • Traffic sign Recognition, Notification and Driver Assistive Technology Development (Ongoing)
  • Designing Intellectual Property for High Speed Data Transfer , High Performance Computing
  • Image Recognition with Pynq FPGA
  • Signal Processing (Audio Processing, Object Tracking)
  • Design and Verification of Data Transfer application on FPGA (Host to Card or vv.)
  • PCB Design with KiCAD, Eagle and  Altium. 
Open Source Hardware
  • -Raspberry Pi based Smart Home systems, Multimedia systems, Smart Grid systems, Smart Irrigation Systems etc.
  • -Arduino based Curtain Control Systems, Home Automation systems
For more details about our project please visit: Digitronix Nepal's Project List


Here are Some Details about Digitronix Nepal.

Current Development

Digitronix Nepal FPGA R & D Center has Developed Different IP's (Intellectual Properties) targeted for Different Xilinx FPGA Families and which are  targeted of market in Communication, Signal Processing and Networking.
We also Create Application based IP's as for as customer need. We deliver more cost effective IP for FPGA with effective customer support. Our IP can be purchased in different schemes (Netlist Node-Locked,Netlist Floating and  Source Code Single Site) which have different price range variations.
Ready to deliver IP's
    1.Application based IP(Signal Processing) and Peripheral Cores (UART, I2C etc.)
       Targeted FPGA's are:
          a.7 Series FPGA of Xilinx
          b.Ultrascale FPGA Family of Xilinx.

FPGA Project Archives of Digitronix Nepal


Project Accomplished:
  • Video Streaming and Processing with Zynq (Zybo) FPGA.
  • Image Enhancement with Zynq FPGA.
  • Verilog Course Design for Online Learning Site.
  • Understanding on Scatter Gather List (SGL Preparaion and Submission Block)

Conducted Training's on (for Professional and Academicians):
  • Embedded System Design with Zynq FPGA and VIVADO (Xilinx Training Syllabus)
  • System Level Design with Zynq and VIVADO (RTOS and FSB Design)(Xilinx Training Syllabus)

Trainer on : Faculty Training
  • FPGA Design with Zybo FPGA and VIVADO, Kantipur Engineering College
  • FPGA Design with  VIVADO Design Suit, Khwopa College of Engineering
  • Student Training
  • FPGA Design with Xilinx ISE Design Suit, Himalaya College of Engineering

Research Outcomes (Paper, Proceedings and Articles) on:
  • Very High Speed Packet Processing with FPGA and Custom Hardware (few Gbps to several Gbps)
  • Packet Processing with heterogenous hardware: Herterogenous Computing
  • RISC Processor Design
  • Data Center based IP Design

Other Skill Sets:
  • Skills on FPGA Design Flow with VIVADO (Xilinx Training Syllabus)
  • Embedded System Design with Zynq FPGA and VIVADO (Xilinx Training Syllabus)
  • System Level Design with Zynq and VIVADO (RTOS and FSB Design)(Xilinx Training Syllabus)
  • Image Processing with Zynq FPGA.

Market Research:
  • FPGA Market Review on Telecom, Medical and Automotive Market Segment.

Short  Reviews on:
  • Packet Processing with OpenCL : Review
  • SDN Implementation on FPGA
  • SDR Implementation on FPGA.

Lab Instruction (for Universities/Colleges) on:
  • Embedded System Design with FPGA, Designing Custom 8 bit Processor and Implementing FSM.
  • HDL implementation on Digital Design, Digital Logic
  • Computer Architecture Design with Verilog HDL.