FPGA Development

Please visit: http://logictronix.com/ for recent development , products and services on FPGA Design from LogicTronix, Inc and Digitronix Nepal.

Digitronix Nepal is working on FPGA since 2013, We have worked on different project including the Real Time Video Processing, Object Tracking, Crypto Algorithm Implementation, Face Recognition, AES Encryption IP Development, Digital Signal Processor Design, 32 bit RISC Processor Design, Petaliux Development and more.

We have the latest update on FPGA Research & Development at: www.LogicTronix.com

Till now we have 12+ Online Courses on FPGA/VHDL/Verilog/MATLAB/PCIe/PYNQ and Xilinx SDSoC/VIVADO/HLS/SDK Courses.

Udemy Courses from Digitronix Nepal and LogicTronix: Our Courses

FPGA Research and Development in Nepal: 24th April, 2018.
Digitronix Nepal has expertise on FPGA Design, IP Design and Verification. We are working in this field from past 4+ years. We have done FPGA Design projects for Image Processing, Image Annotation, High Speed Data Transfer Application.
We have published paper on Very High Speed Packet Processing, PCIe 4.0 Terminologies, Image Processing with Zynq FPGA, UART Implementation on FPGA etc.

Digitronix Nepal has Created 5 Courses on FPGA Design with High Level Synthesis (HLS: C/C++ Design Approach on FPGA Design), VHDL Programming , Verilog Programming, Embedded system design with xilinx Zynq FPGA and VIVADO.
Our Udemy Profile is at:https://www.udemy.com/user/digitronix-nepal/
For $10 Course Coupon of our courses, please send us email at: digitronixnepali@gmail.com.

Digitronix Nepal can provide FPGA Design, Research and Development Services and ASIC/VLSI Design and Verification. Please contact us for projects at: digitronixnepali@gmail.com

Digitronix Nepal also have create Reference Guide on VHDL Programming, Verilog Programming, Tcl Programming, the detail of the reference guide is also available on below.
Post 7/23/2017 : See www.logictronix.com or Facebook Page for more details

A. Digitronix Nepal has Prepared "VHDL Reference Guide For Beginners"  if you like to download  the Reference Guide then mail to : digitronixnepali@gmail.com

Table of Contents

Design and Simulation of
1.  Gate
2.  MUX, Encoder
3.  DeMUX, Decoder
4.  Half Adder
5.  Full Adder
6.   ALU Design (2–bit)
7.  Latch , Flip-flops
8.  Structural Design in VHDL: 8 bit ALU Design
9.  Counter Design
10. Finite State Machine: Sequence Detector
11. File Handling in VHDL
12. Image Processing in VHDL
13. Complete flow for Implementing design in Spartan 3E FPGA and                                      Zybo (Zynq 7000 FPGA)

Digitronix Nepal also has Prepared "Verilog Reference Guide

For Beginners" if you like to download then mail us. 

B. Digitronix Nepal  has Prepared Tcl Reference Guide For Beginners 

Table of Contents

1.  Hello World

2.  Tcl Comments

3.  Constants, Variable, Basic Operation

4.  Mathematical Expression

5.  Calculation

6.  Operators: Arithematic

7.  Control Statements : Conditional Statements

8.  If, Else if, if then , switch statments

9.  Looping Structure: For Loop, While Loop

10. Procedures

11. Array and Strings

12. Package in Tcl

13. List in Tcl

14. File Handling in Tcl

15.  Appending Lists and List Functions

16. File Handling functions

if you like to download then mail to : digitronixnepali@gmail.com

C. Online Course on Verilog Programming

Module 1.  Introduction and Basic Design with Verilog

Topic 1 : Introduction and Basic Concepts Verilog
Topic 2 : Module, Input and output declaration in Verilog
Topic 3 : Basic Operation in Verilog

Module 2.  Simulating Verilog Code with Testfixture

Topic 1 : Basic concept of  Simulation and  Testbench
Topic 2 : Device Under Test (DUT)
Topic 3 : Instantiate stimulus

Module 3.  Conditional Statement with Verilog

Topic 1 : Basic concept of Conditional Statement
Topic 2 : Using always block
Topic 3 : IF Statement
Topic 4: Case Statement

Module 4.  Combinational Circuit Design with Verilog

 Topic 1 : Basic concept of Combinational Circuit
Topic 2 : Gate Design
Topic 3 : Combination of Gate Design
Topic 4: Decoder Design

Module 5.  Sequential Circuit Design with Verilog

Topic 1 : Latch design
Topic 2 : Flipflop design
Topic 3 : Register design
Topic 4: FSM Design in Verilog

Module 6.  Structural Design in Verilog

Topic 1 : Structural design basic
Topic 2 : Creating different modules
Topic 3:  Integrating different modules in single code

Want to Take Part on Course then Contact us.

D. FPGA Development Updates: Digitronix Nepal is working with different series of Xilinx FPGAs, Currently we have Spartan 3e, Spartan 3A, and ZYBO FPGA. We work on ISE design suit and VIVADO design suit in Nepal. The Vivado Design Suit License are donated by Xilinx University program for FPGA research in Nepal. We are assisting engineering college of Nepal for FPGA Research and Development via Xilinx State of Art FPGA and ASIC technologies.
we are of main vision of FPGA based IP development in Nepal, Currently we are working on IP development for Xilinx 7 sereis and Ultrascale Boards along with Zynq family.
Please remember us for any such FPGA based design works , we provide quality at  reasonable cost.

In 2017 we have organized an Interaction program on FPGA in Nepal with Guest Speaker- Expert From Xilinx Inc.

And in 2017 we have Announced to Organized the "Second National FPGA Design Competition 2017" with Collaborating with different Engineering College of Nepal.

We have also have organized the " National FPGA Design Contest 2016" in July 2016 with collaborating with many renowned engineering college of Nepal, the IP development is major focus on competition.

 

Themes are: 

FPGA TUTORIALS for learning FPGA Easily...........Download From Here

Digitronix Nepal's has Tutorial For Beginner, Intermediate and Advance Trainers on FPGA as for Beginners we have following type of tutorials as on How to Create a Basic Logic Gate (AND Gate) in ISE for Spartan 3E.
Digitronix Nepal Has More than 30 Video Tutorials including with How to Create IP on VIVADO in HDL, How to Create IP on VIVADO HLS, How to work with Tcl Script in VIVADO,Image processing with VHDL/Verilog on ZedBoard FPGA, Zybo FPGA,Pynq FPGA , Spartan 3E FPGA and Nexys 3 FPGA. We also have make different Tutorials on Xilinx ISE Design Suit and Xilinx VIVADO Design Suit.
Visit our YouTube Channel for More Videos: https://www.youtube.com/c/digitronixnepal

Visit: https://www.youtube.com/c/digitronixnepal

For More FPGA Tutorials See.. FPGA.. For Software and Tools from Xilinx Visit Xilinx.com/downloads or see FPGA Programming .. fpga tutorial

 FPGA Prototyping  By VHDL Examples 

 Buy Book from Amazon or Contact us for Hard Copy: FPGA Prototyping  By VHDL Examples

Most Watched Video Tutorial on FPGA Design at our Youtube Channel:    https://www.youtube.com/c/digitronixnepal

1.Getting Started with ZedBoard with Linux Bootup and Led Blinking by Digitronix Nepal

2. Zedboard getting started with VIVADO and SDK Switch Buttons and Led Interfacing with AXI GPIO IP

3. Zybo Tutorial on Audio Codec & Filter by Digitronix Nepal

4. Basic Image Processing in Python with Pynq FPGA & USB Webcam

5. OpenCV Face and Eye Detection with Pynq FPGA & USB Webcam by Digitronix Nepal

6. PYNQ FPGA 3rd Session_Simple Neural Net Implementation on Python by Digitronix Nepal

7. Pynq FPGA 4th Session on Audio Processing and Python Examples by Digitronix Nepal