Nepal Semiconductor Strategy - 1.0 [2083]

The Nepal Semiconductor Industry Association (NSIA) and its members are collaborating with the Ministry of Science, Technology and Innovation (MoSTI), Government of Nepal, to develop and draft Nepal Semiconductor Strategy 1.0 (नेपाल सेमिकन्डक्टर रणनीति–१.०), NEPSemicon-1.0. 

Strategic Focus of the NEPSemicon-1.0 is:

Build a high-technology semiconductor design ecosystem in Nepal by integrating talent, research, industry, intellectual property (IP), EDA/design tools, investment, and international markets.

This document, later on guidelines, will work as "Strategic Blueprint for Building a Design-Centric Semiconductor Ecosystem in Nepal". 

रणनीतिक केन्द्रबिन्दु:

नेपालमा उच्च प्रविधियुक्त सेमिकन्डक्टर डिजाइन इकोसिस्टम निर्माण गर्दै जनशक्ति, अनुसन्धान, उद्योग, बौद्धिक सम्पत्ति (IP), EDA/डिजाइन टुल, लगानी तथा अन्तर्राष्ट्रिय बजारलाई एकीकृत गर्ने।

डिजाइन–केन्द्रित सेमिकन्डक्टर इकोसिस्टम निर्माणको रणनीतिक मस्यौदा

 

 #NepSemicon1.0 #NSIA #Nepal #Semiconductor #Design #Strategy #EDA #ChipDesign

IP protection for Semiconductor and Integrated Circuit (IC) layout designs in Nepal

 📢 A small but important milestone toward building a Semiconductor Design Industry in Nepal.
The Government of Nepal has released bill to facilitate Intellectual Property (IP) protection for Semiconductor and Integrated Circuit (IC) layout designs.
Inventors and companies can now register their semiconductor integrated circuit layout designs as intellectual property with the Department of Industry, IP Rights and Trademark Registrar's Office, providing legal protection for their semiconductor design innovations.

This marks a positive step toward establishing a stronger legal and innovation ecosystem for semiconductor design in Nepal.
📄 More details - https://www.newbusinessage.com/news/49255/nepal-proposes-first-ever-legal-protection-for-chip-layout-designs/ 

 
#Nepal #Semiconductor #Design #Industry

 

Nepal Semiconductor Design Meetup 1.1

We , NSIA is organizing Nepal semiconductor design meetup 2026 , a v1.1  event on semiconductor design in Nepal. If you are interested on this event then please fill up the registration form.

Here is the event detail:

Date/Time - May 30th , 2026 , Saturday [12PM to 2:30PM]

Venue - LogicTronix Technologies, Kupondole, Lalitpur, Nepal

Google Map - https://maps.app.goo.gl/ifUybaT9cQCjgDTaA

Contact - info@logictronix.com or digitronixnepali@gmail.com

Phone - 9841078525

Agendas of Meetup:

1. Networking between Semiconductor Design professional or enthusiast in Nepal.
2. To share knowledge and ideas around semiconductor design - FPGA and VLSI design.
3. Open sourced and vendor specific resource and project idea discussion on semiconductor.
4. Community setup for "Nepal Semiconductor Development - Vision".
5. NSIA activity towards Vision, Mission and Goal and roadmaps.

 

 Registration Form - https://forms.gle/xhaLyo9BixK74ktc9 

Winner Announced - 9th National FPGA Design Competition 2026

Winner Announced!!!

Today, the final demo and evaluation of the 9th National FPGA Design Competition 2026 was held at the Nepal Engineers’ Association Building, Pulchowk.

Based on the final evaluation, the team “Particle Path Tracking using GNN on FPGA” from IOE Pulchowk Campus emerged as the winner, while the team “Weather Parameters Forecasting using FINN with PYNQ FPGA” from Kathmandu University secured the runner-up position.

We extend our congratulations to all participating teams and commend their hard work and dedication in FPGA/VHDL/Verilog development, as well as system and accelerator design.

We are thankful to Jury team, Staff FPGA Design Engineer (LogicTronix Technologies) Abhidan Jung Thapa and Staff FPGA Design Engineer(LogicTronix Technologies) Nikil Thapa for their time for the judgement-hour. We are also grateful to Nepal Engineers Association (NEA) for providing venue for the competition final demo and winner announcement day.
#Nepal #FPGA #Design #Competition #Final #Semiconductor

 

(Please click on the image to see in high quality) 

 

The short detail about the participating project and team are at below: 

 

 

(Please click on the image to see in high quality)