8th National FPGA Design Competition 2024/2025 Announced!

We , LogicTronix and LOCUS 2025 (IOE Pulchowk Campus) are jointly organizing the "8th National FPGA Design Competition 2024/2025" !

For more details of the competition, please visit following poster or keep tuning LOCUS 2025 social media handles!

Advanced FPGA Design Elective -I Course at IOE , TU, Nepal

Institute of Engineering (IOE) has approved "Elective-I" Syllabus on "Advanced FPGA and Embedded Design (EX72506)" which includes advanced FPGA design topics , recent FPGA design methodologies, Verilog development, VLSI-CMOS design approaches in Semiconductor Industries and multiple Lab sessions on FPGA. The syllabus and course development was done by LogicTronix in collaboration with IOE, Pulchowk Campus, the syllabus was created by targeting real world application and industry requirement in this Semiconductor/chips era . This year BEI and BCT students of 7th Semester from Pulchowk Campus took the elective and did very well while learning with it and gaining skills/knowledge in it.

Next year students from all IoE Campuses and affiliated colleges can took this elective and open door towards FPGA, VLSI and Semiconductor design field.

If you like to go through the Syllabus of this elective then you can check IoE Syllabus booklet or write here or at email info@logictronix.com!
#FPGA #Elective #IOE #Nepal #Pulchowk #Electronics #Computer #Electrical #Engineering #CSE #Semiconductor #VLSI #UniversityIndustryCollaboration #University #Grant #Commission

Call for Proposal from B.E Students for Final Year or Research Projects- Grant Announcement

Collaborating with LogicTronix(AMD-Xilinx's Global Partner for FPGA Design + ML Acceleration), we, Digitronix Nepal, are pleased to announce the "Final Year Project/Research Project Grant" for B.E or equivalent undergrad Students in Nepal(from any University/College or Institution) who wish to pursue final year or academic project or research project on topic related to "FPGA Design , Computer Vision, Machine Learning and Acceleration". 

Under this Grant Plan, final year students can pursue their academic project as usual(as a regular Final Year Project) at their University or College while we provide them with independent grants. We will also coordinate with the respective University or Colleges from where the project applied and received a grant from us.

Here is the timeline for the Project Proposals:

Project Proposal Registration Timeline: May 15th 2023 to December 31, 2023

Selection Timeline(Selection Results Announcement): Monthly till December 31, 2023

 

Grant Amount:

1. For the Final Year Project (Ranging time of one or two Academic Semester) , we will provide Grant of NRs. 20,000 (Twenty Thousand) to the Selected Team for the Selected Final Year or Research Project.
   
2. The Project Grant will be provided in two installment, half of grant amount will be provided after official starting of project(officially from university/college and us) and remaining half of Grant at the completion of the project (after report and project submission to University and us).

Selection Criteria(Evaluation Method):

1. We will evaluate project proposal and project plan thoroughly from the project team member. We will select and award the Grant to the deserving project team based on their project plan (effort and time).
2. Our team will review proposal based on following criteria(topics)
• Detail Plan for the Implementation (work to be done),
• Uniqueness or innovation (What innovation did the project team is proposing on project proposal),
• Optimization Level and Planned approach on Implementation, how the implementation will be optimized to get better results than the readily available implementation or works.
  
• [Optional] Possibility of implementing the project on edge platform (low power and low cost hardware).

Objective of this Grant:

1. To enhance skills of Engineering Students of Electronics, Electrical, Computer and equivalent in the field of FPGA Design(Verilog/VHDL/RTL/HLS/IP Design Methodology and Systems Design with FPGAs), Embedded Design, Machine Learning(ML Implementations, Optimization and Acceleration), Computer Vision(Vision Algorithms , Methodologies and Implementation), Algorithmic Development, Signal Processing, Different types of Processor Architecture Design and Low Latency Design
   
2. Enrich the Industry-Academic Collaboration in Nepal. This program aim to enrich and strengthen Industry-Academic Collaboration, so the graduates from Universities can get the "Real World Skills" around FPGA Design and Machine Learning so that on graduation they can be ready for garbing the Opportunity at Industries(Technology Companies or Design Companies).
   
3. On completion of this Grant project, students will obtain industry grade skills on FPGA Design and Machine Learning and ready for Job Opportunity.

After Final Year Project or Research Project: Project team members will also get Paid Internship Offer from LogicTronix after completion of this Grant Period (Project Period).

 

For "Grant Guidelines and Registration" visit: here

 

For any queries regarding to this Research/Final Year Project Grant, please contact us at email: digitronixnepali@gmail.com or info@logictronix.com.

Winner Announcement of "7th National FPGA Design Competition-2023"

We have announced the Winner of "7th National FPGA Design Competition-2023"!

Winner of the Competition is Milan Rai from IOE-ERC, Dharan with Project "Implementation of RISC-V RV32I Base Integer Instruction Set Architecture in VHDL(short video demo of the project:https://youtu.be/Isc3ZnvC_9U)". 

The Best Project Idea title is won by team of Avishek Luitel, Manita Dangol, Prasanna Dahal, Rajan Shrestha from Khwopa Engineering College with project "Adaptive Traffic Light Control System using Ultra96v2 FPGA and Machine Learning".

Our Jury has evaluated evaluate each projects on "7th National FPGA Design Competition" based on Project Work, Complexity, Completeness, Innovation, Project Architecture/Structuring and the Demo.

We like to thank Jury Team and our Co-organizer LogicTronix!

 

 

The participating Teams/Projects on the FPGA Design Competition are:

 

#FPGA #Design #Competition #Nepal #DigitronixNepal #LogicTronix #Xilinx #Intel #Microchip #Lattice #VHDL #Verilog #MachineLearning