Tuesday, February 6, 2018

White Paper and Reference Guide from Digitronix Nepal on FPGA Design

Following are the white paper and reference guide on FPGA Design from Digitronix Nepal. If you need this resources then do send us Email at: digitronixnepali@gmail.com
  1. Verilog/VHDL and Tcl Reference Guide
  2. PCIe Terminologies (from PCI to PCIe Gen 3): Whilte Paper
  3. White paper document on PCIe Gen4 new features and it's applications
  4. VIVADO Design suit Reference Guide
  5. Reference Guide on Xilinx's DMA Subsystem for PCIe: XDMA Example Design, Driver Installation, Debugging and Analysis Guide.
  6. lspci and setpci Reference Manual for Xilinx PCIe IP
  7. lspci and setpci scripts for automatic report generation and analysis
  8. Answer Record on Debugging at Device Startup (VIVADO ILA Trigger at Startup)
  9. Reference Guide: FPGA Design with OpenCL
  10. Reference Manual: Very High Speed Packet Processing System and Architecture: FPGA and Heterogeneous Computing Methodology
  11. Tcl Scripting for VIVADO Design's for automation and Design/Verification: Reference Guide
  12. AXI PCIe and MIG based design with Xilinx 7 Series, Ultrascale and Ultrascale+ FPGA's.
Our Online Courses at Udemy, along with $9.99 Coupon Code Link:
  1. FPGA Design with VHDL: Online Course Session at Udemy: $9.99 Coupon Code
  2. FPGA Design with System Generator: Reference Documents and Online Course's Coupon of Udemy:$9.99 Coupon Code of Udemy Course
  3. FPGA Design with High Level Synthesis: Reference Document's and Online Course $9.99 Coupon Code
  4. Embedded System Design with Xilinx VIVADO and Zynq FPGA: $9.99 Coupon Code
  5. Verilog Programming with VIVADO Design Suit: $9.99 Coupon Code
  6. Verilog Programming with ISE Design Suit: $9.99 Coupon Code
  7. VHDL Programming with ISE Design Suit: $9.99 Coupon Code
  8. Zynq Ultrascale+MPSoC Development: $9.99 Coupon Code
Hot Course: Zynq Ultrascale+MPSoC Development Online Course at Udemy

Monday, January 15, 2018

FPGA Design with System Generator (Matlab/Simulink) & HDL Coder

We are working with Projects on "FPGA Design with System Generator (Matlab/Simulink) and HDL Coder". This Matlab/Simulink based FPGA Design Platform System Generator (so called Sys Gen) is useful for Designing  and Implementing Signal Processing Projects (Image Processing, Audio Processing etc.).Furthermore, System Generator is heavily preferred for Digital Signal Processing.

From the System Generator we can design, test and implement Matlab or Simulink based project's on FPGA. We can create RTL Netlist or Generate HDL from the System Generator (Matlab/Simulink) Project or can generate Bitstream file from the System Generator so we can upload project directly to FPGA.
Another Design Flow is we can Run Co-Simulation of System Generator projects with FPGA Board (which is as real time hardware based simulation). Or we can create bit file and dump on the FPGA board. This design flow supports large number of FPGA Boards form Xilinx and Intel/Altera, so there are many references on FPGA Design with System Generator.

For any projects on System Generator (Matlab/Simulink) or HDL Coder for FPGA Development, you can remember us. You can mail us your requirement at: digitronixnepali@gmail.com
FPGA Design with System Generator and HDL Coder Click==>Online Course at Udemy (click here)
FIR Implementation on System Generator
Do you want to Learn FPGA Design with MATLAB and Simulink
Then here is an Online Course at $9.99: Udemy Course (Click here) Link

Thursday, January 4, 2018

2017 Review of Digitronix Nepal

Summarizing 2017, we have following reviews:
  1. We create few more courses on FPGA, until the end of 2017 we have SIX Courses on Udemy.com. You can ger $10 Course Coupon or Lucky Free Coupon's for that send us request at digitronixnepali@gmail.com or facebook.com/DigitronixNepal
  2. We have Completed the Implementation of Canny Edge Detection in High Level Synthesis (VIVADO HLS), finally we generate IP (so called Intellectual Property) and Exported it to VIVADO IP integrator and combine with other blocks (DMA's, Processing System's and HDMI IP's). We have tested this project and obtained outstanding result in Zedboard and ZC702 FPGA's, this design can be migrated to other Zynq Families and Kintex/Vertex Families.
  3. We have Created Userguide on "lspci for FPGA's", this user guide consists of all the lspci bash commands which show you information of PCI or PCIe cards connected to your PC/Motherboard. Example: $lspci -vvv this command show you all the information of your PCI/PCIe devices and registers, status etc. You can tried out this command on any Linux PC.
  4. We have Created the lspci bash script for getting required information from the installed card (FPGA or other PCI card's). Our lspci script will give you result of "which status register is set and which are unset" for identification of your card's issues and problems.  We can deliver any type of such script for custom problem and solution, for that send mail at: digitronixnepali@gmail.com.
We will update more review of 2017 soon, let us know if you have any interest on our Services and Products.
Happy New Year 2018 (Belated)!!!