Summary of Second All Nepal FPGA Design Competition July 15, 2017

Digitronix Nepal had Organized Second All Nepal FPGA Design Competition 2017 with Co-Organizers of Kathford Int'l College of Engineering and Management, National College of Engineering, Sagarmatha Engineering College and Kathmandu Engineering College.

The Second Edition of FPGA (Field Programmable Gate Array, a hardware design platform) has explore the different new ideas, research capability and development in Nepal. The Main Attraction of the Competition is AES (Advance Encryption Standard) Encryption of the data for communication, Face Recognition with PYNQ (Python+Zynq) FPGA, Image Annotation (recognition and labeling) with Zynq FPGA, OFDM (Orthogonal Frequency Division Multiplexing, an optimized FDM) implementation on FPGA, Voting Machine Design with FPGA. Judge and Visitors of the competition also heavily interested on Spectrum Analyzer with FPGA, Digital Clock with Spartan 3E, PS2 Keyboard and LCD interfacing with FPGA and LCD interfacing with FPGA.

This Edition of FPGA competition make a new direction on FPGA Research and Development in Nepal. Digitronix Nepal is partnering with National and International Companies/Organizations for manufacturing some of this feasible ideas and marketing on the global market.

Digitronix Nepal is hopeful that more and more stakeholders of the Hardware Design Ecosystem will join the “Hardware Research and Development Initiative in Nepal” for creating more and more opportunities for Nepalese Engineering professionals.