IP protection for Semiconductor and Integrated Circuit (IC) layout designs in Nepal

 📢 A small but important milestone toward building a Semiconductor Design Industry in Nepal.
The Government of Nepal has released bill to facilitate Intellectual Property (IP) protection for Semiconductor and Integrated Circuit (IC) layout designs.
Inventors and companies can now register their semiconductor integrated circuit layout designs as intellectual property with the Department of Industry, IP Rights and Trademark Registrar's Office, providing legal protection for their semiconductor design innovations.

This marks a positive step toward establishing a stronger legal and innovation ecosystem for semiconductor design in Nepal.
📄 More details - https://www.newbusinessage.com/news/49255/nepal-proposes-first-ever-legal-protection-for-chip-layout-designs/ 

 
#Nepal #Semiconductor #Design #Industry

 

Venue of 9th National FPGA Design Competition 2026 - Final Demo

The 9th National FPGA Design Competition Finals will be held at Nepal Engineers' Association Building in Pulchowk, Lalitpur! Visitors are also warmly welcome.
We will be hosting the 9th National FPGA Design Competition 2026, including the final demonstrations and winner announcement, at the NEA Building, Pulchowk, Lalitpur.
We are thankful to Nepal Engineers Association for facilitating us!

See you there at January 24th! 

#FPGA #Competition #Semiconductor #Design #Nepal

Winner Announcement of "6th National FPGA Design Competition 2021"!

The "Winning Project" of this 6th edition of "FPGA Design Competition" is "Implementation of Optimized Vedic Multiplication Core in Verilog & Xilinx Zynq FPGA" by Santosh Shaha of Kathmandu University, School of Engineering.

The "Best Project Idea" title goes to project "QPSK Modulation and Demodulation in FPGA for Wireless Communication" by team of Bikesh Dhonju, Rajal Baral, Sanuj Kumar Shah and Pramod Karki , Khwopa Engineering College - KhEC, Bhaktapur".

The Winning Project and Best Project Idea teams will get "Cash Prize, Certifications and Internship Offering" from us (Organizers). All the participants of the FPGA Design Competition will get "Certification of Participation"!

We are thankful to all sponsors , all the participants and judges of the competition! We are grateful to LogicTronix for being Co-organizer of this FPGA Design Competition.

International FPGA Design Competition 2019-Winner Announced

Digitronix Nepal and LogicTronix has organized the "International FPGA Design Competition 2019", the winner and runner-up of the competition has been announced at August 210, 2019. Here are the Winner and Runner-up of "International FPGA Design Competition-2019".
Winner: 32-bit Harvard Microprocessor, Team: Ahmad Khaled , Hassan Ibrahim , Ahmad Tolan , Ahmad Ashour, University/Affilation: Cairo University - Faculty of Engineering, Country: Egypt

Runner-up: Design and Implementation of a Frequency Hopping System based on FPGA, Team: Ahmed M. Alfadhel, University: Al-Furat Al-Awsat Technical University, Country: Iraq

We would like to Congratulate to all winners and all participating teams!
#International #FPGA #Design #Competition #2019

Here is the details of all teams participating on the Competition.

"4th National FPGA Design Competition 2019" Concluded Successfully

"4th National FPGA Design Competition 2019" concluded today! Among the 11 competing teams, the Winner of the competition is project "Vehicle to Vehicle Communication using FPGA" of Nikhil Thapa, Devendra Patel, Kishan Shrestha & Swarnim Shrestha from Khwopa Engineering College - KhEC, first runner up is project "Frequency Control of Synchronous Generator using Fuzzy Logic" of Rajiv Bishwokarma, Bishal Bhetwal, Shayarrn Khatiwoda from Kathmandu University, Dhulikhel and Second Runner up is project "Voting Machine" of Binita Pariyar, Rasmila Thike, Sunmoon Tulsibakhya & Usha Dahal from Khwopa Engineering College - KhEC.
Congratulations to all the Winners and Participant's!
Digitronix Nepal is thankful to today's Chief Guest Surendra Shrestha, PhD (HoD, Department of Electronics and Computer, IoE Pulchowk Campus), Jury Members: Asst. Prof. Deepesh Prakash Guragain (Nepal Engineering College), Er. Dinesh Baniya Kshatri (Thapathali Campus).
We are grateful to Kathford International College of Engineering and Management for being the Organizer of the event and we are grateful to Asso. Prof. Dr. Mahesh Chandra Luitel (Principal, Kathford), Er. Prabin Kumar Jha (D-HoD, Department of Electronics and Computer, Kathford) and Faculty of Kathford- Saban Kumar KC, Pawan Khadka ,Kiran Bagale and team facilitate today's event. Thank you everyone for supporting us and "FPGA Research in Nepal" Initiative!

International FPGA Design Competition 2019

Along with "4th National FPGA Design Competition-2019", we are also hosting "Online Version" of separate "International FPGA Design Competition-2019". We already getting participant request for the "International FPGA Design Competition" from different Countries. Fill the registration form: bit.ly/FPGA_Competition_2019

For any queries: info@logictronix.com or digitronixnepali@gmail.com.